A Near-Memory Computing Architecture for Real-Time Surface Electromyography Feature Extraction on FPGA

Real-time processing of surface electromyography (sEMG) signals-particularly chin EMG for predicting obstructive sleep apnea (OSA)-is vital for medical wearables but constrained by energy and throughput limitations. This paper presents a near-memory computing (NMC) architecture implemented on a Nexys Artix-7 (A7) Field Programmable Gate Array (FPGA) to accelerate sEMG feature extraction. The design computes four sEMG features-Zero Crossings (ZC), Integrated EMG (IEMG), Waveform Length (WL), and Mean Absolute Value (MAV)-using an 8-bit Q3.5 fixedpoint pipelined datapath co-located with on-chip block RAM (BRAM), effectively eliminating off-chip data transfers. The NMC engine processes 97,60810 -second epochs per second (covering 271 hours of signal data each second) and achieves a 5.7 × lower energy per epoch than a conventional DRAMbased pipeline while reproducing feature values within 2% of a MATLAB reference implementation across 2,056 diverse subjects from the Multi-Ethnic Study of Atherosclerosis (MESA) dataset. Moreover, it occupies only ∼ 0.3% of the FPGA's logic resources, indicating an extremely small hardware footprint.